Saaswath
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Sarabjeet Singh
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Biswabandan Panda
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BOOM: The Berkeley Out-of-Order RISC-V Processor
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Bespoke Silicon Group
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Suraaj K S
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Accelergy Project
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Intelligent Computing Lab
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QNANO - Quantum and Nano Systems - Politecnico di Torino
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Rivos Inc.
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Rajesh Shashi Kumar
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Andreas Olofsson
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VLSI Design & Automation Group
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Tenstorrent AI ULC
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Embedded Systems Lab (ESL) - EPFL
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Anish Saxena
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Gergely Bálint
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Micro Architecture at Santa Cruz (MASC)
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Arjun Menon Vadakkeveedu
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Yale Asynchronous VLSI and Architecture Group
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Sharc-Lab
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Remzi Arpaci-Dusseau
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Nick
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UCSBarchlab
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SCALE-Sim Project
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Side-Channel Marvels
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University of Maryland Memory-Systems Research
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Project F
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raulbehl
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CHIPS Alliance
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Programming Languages and Verification Group at MIT CSAIL
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RAPIDS
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High Performance Architecture Lab at GT
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Pawan Kumar Sanjaya
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Dong Wang
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TrustworthyComputing
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Persistent Memory Programming
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Abhishek Vashist
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Fengbin Tu
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Systems Research at ShiftLab
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Luke Wren
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PolyArch
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Matt Venn
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Vertical Research Group
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Vortex OpenGPU
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RISC-V Non-ISA Specifications
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Atul Kumar
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UC Berkeley Architecture Research
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pulp-platform
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Bruno Levy
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SCARV
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RISC-V
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Ben Marshall
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Yosys Headquarters
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Micro Electronics Research Laboratory
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The Open-Source FPGA Foundation
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nandland
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The OpenROAD Project
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SAFARI Research Group at ETH Zurich and Carnegie Mellon University
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Yash Garg
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Unai Martinez-Corral
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enjoy-digital
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bring-your-own-core
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Jonathan Balkind
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Omkar Bhilare
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ultraembedded
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VSD
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Pranav Mittal
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Shubhanshu Saxena
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Vikhyath Venkatraman
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Xilinx University Program
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Shubhendra Pal Singhal
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Akilesh Kannan
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Dhinesh
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Shrihari G
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Shivam Potdar
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Steve Hoover
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Suyash Mahar
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Lavish Bansal
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Shreyash Kumar Singh
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Lakshya Singh
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Shashank Pathak
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Andrej
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Rishabh Agrahari
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Somnath Kumar
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Nishant Kumar
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Lokesh Krishna
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Nishant Mittal
