Saaswath
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Sarabjeet Singh
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Biswabandan Panda
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riscv-boom
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bespoke-silicon-group
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Suraaj K S
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accelergy-project
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intelligent-computing-lab-yale
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vlsi-nanocomputing
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rivosinc
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Rajesh Shashi Kumar
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Andreas Olofsson
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vlsida
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tenstorrent
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esl-epfl
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Anish Saxena
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Gergely Bálint
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masc-ucsc
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Arjun Menon Vadakkeveedu
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asyncvlsi
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sharc-lab
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Remzi Arpaci-Dusseau
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Nick
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ucsbarchlab
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scalesim-project
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sidechannelmarvels
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umd-memsys
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projf
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raulbehl
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chipsalliance
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mit-plv
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rapidsai
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gthparch
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Pawan Kumar Sanjaya
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Dong Wang
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trustworthycomputing
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pmem
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Abhishek Vashist
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Fengbin Tu
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systems-shiftlab
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Luke Wren
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polyarch
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Matt Venn
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verticalresearchgroup
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vortexgpgpu
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RISC-V Non-ISA Specifications
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Atul Kumar
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UC Berkeley Architecture Research
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pulp-platform
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Bruno Levy
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SCARV
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RISC-V
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Ben Marshall
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Yosys Headquarters
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Micro Electronics Research Laboratory
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The Open-Source FPGA Foundation
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nandland
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The OpenROAD Project
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SAFARI Research Group at ETH Zurich and Carnegie Mellon University
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Yash Garg
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Unai Martinez-Corral
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enjoy-digital
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bring-your-own-core
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Jonathan Balkind
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Omkar Bhilare
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ultraembedded
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VSD
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Pranav Mittal
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Shubhanshu Saxena
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Vikhyath Venkatraman
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Xilinx University Program
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Shubhendra Pal Singhal
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Akilesh Kannan
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Dhinesh
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Shrihari G
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Shivam Potdar
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Steve Hoover
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Suyash Mahar
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Lavish Bansal
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Shreyash Kumar Singh
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Lakshya Singh
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Shashank Pathak
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Andrej
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Rishabh Agrahari
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Somnath Kumar
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Nishant Kumar
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Lokesh Krishna
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Nishant Mittal
